The most common method of obtaining a digital signal from an analog one, where a digital value of either one or zero is expected, is to use a comparator to compare a voltage or current with a reference signal. The comparator typically outputs one of the two voltages corresponding to the two possible binary values. Various and often sophisticated techniques have been described for the purpose of enhancing the signal in analog form using analog circuits before conversion to digital values, as have been digital error correction techniques used to enhance the resulting digital data.
In the particular application of processing signals received from a detector which is reading densely arranged information in binary code and which itself is a read head comprised of multiple detector elements, the outputs of the elements do not necessarily coincide with the values on the medium unless, at the very least, there is precise registration between the two. The past approach for achieving adequate registration between read heads and data has been to ensure sufficient mechanical precision in the location of read heads with respect to the data. To circumvent the increasing mechanical difficulty and cost of achieving registration with increasing data density, U.S. Pat. No. 4,695,991 discloses a compensation technique entailing manipulation of the observed values instead of attempts to achieve actual registration. However, there remain difficulties with that technique, in its various embodiments, in handling the increasing influence of multiple bits on the output of a single detector element as the data density increases, for example arising from the optics of a photosensitive detector arrangement.